ASIC Design Verification

VLSI EXPERT / Level 2

  • Duration: 4 Months
  • 21 Assignments
  • 50+ Online Papers 
  • Ideal for Following Profiles -
  • RTL Design Engineer
  • RTL Verification Engineer
  •  R&D Engineer
  •  Application Engineer
  • Product Validation Engineer

ECE/EEE students of the following years

  • B.E./B.Tech. 2nd Year, 3rd year, 4th year
  • M.E./M.Tech. 1st Year, 2nd year
  • Pass-out candidates

Other candidates: - Please connect with us to check eligibility.

  • Overview
  • Curriculum
  • Instructor
  • FAQ’s

ASIC Design Verification – Course Overview

At VLSI Expert, our ASIC Design Verification program is designed to equip engineers with deep industry-relevant skills in verifying complex SoC designs. Our curriculum is crafted by seasoned professionals and mapped directly to real-world verification challenges and company hiring expectations. This makes our trainees interview-ready, project-capable, and aligned with what top semiconductor companies seek.

From digital fundamentals to hands-on verification projects with industry-standard protocols, this course bridges the gap between academic knowledge and professional competence.

What Makes This Program Unique?

✅ Industry-Curated Curriculum

✅ Hands-On Projects Using Real SoC Protocols

✅ Latest Standards: SystemVerilog + UVM Methodology

✅ Focus on Practical Skills: RTL Coding, Functional Verification, Debugging, Coverage

✅ Mock Interviews, Resume Prep & Job Mapping Support

📘 Course Modules Breakdown

🔹 Module 1: Digital Basics

A strong foundation in combinational and sequential circuits, FSMs, counters, and sequence detectors prepares students for RTL design and logic debugging in later stages.

🔹 Module 2: Advanced Digital

Covers implementation of digital logic using MUX-based design, decoder/multiplexer preferences, PAL/PLA, clock gating, and logic optimization—everything needed to understand design trade-offs in ASIC flows.

🔹 Module 3: Linux (Basics to Advanced)

Master Linux essentials, scripting, process automation, and utilities like SED, AWK, and Makefiles—essential for automation in modern ASIC environments.

🔹 Module 4: C/C++ Programming

From variables and operators to file handling and OOPs, this module ensures confidence in writing verification tools and scripts, debugging simulations, and developing testbenches.

🔹 Module 5: Verilog HDL

Covers both RTL and gate-level modeling. Focus on IP/Protocol coding, hierarchical design, synthesis-readiness, and all constructs from data flow to behavioral modeling.

🔹 Module 6: SystemVerilog (Basic to Advanced)

Learn modern verification techniques like constrained randomization, functional coverage, and assertions. Includes IPC methods like semaphore/mailbox and OOP-based testbench architecture.

🔹 Module 7: UVM (Universal Verification Methodology)

Complete understanding of UVM components—agent, driver, monitor, sequencer, environment—and how to build scalable, reusable, layered testbenches for protocol-based and custom designs.

🔹 Module 8: Real-Time Projects

💡 On-Chip Protocol Verification Projects:

•I2C

• AMBA-APB, AHB, AXI

💡 Other RTL + Verification Projects:

•FIFO (Synchronous & Asynchronous)

•Dual Port RAM

•Traffic Light Controller

•RISC Processor

🎯 Career Preparation

Along with technical training, we prepare students for successful placement through:

• Placement Readiness Tests & Mock Interviews

•Customized Job Mapping aligned with your strengths and preferences

•One-on-One Career Guidance so you choose not just a job, but your ideal career path

•Continuous Support even after placement

💬 “We don’t just place you. We empower you to choose your career.”

🚨 Note:

Tests or interviews can be conducted at any point during the training to assess your readiness and connect you with hiring partners.

Module 1: Digital Basics (Revision of Engineering course work)

  • Binary System, Logic Levels, Different Logic States, Noise Margins
  • Combinational circuit (Adder, Subtractor, Mux, Decoder, Encoder)
  • Sequential circuit (Flip-flop, Latches, Characteristics tables, Flop conversation, Counters, MOD Counters, Shift Registers)
  • Frequency Divider/Multiplier Circuit
  • Sequence Detector
  • FSM (Mealy and Moore Models)

Module 2: Advance Digital (Implementation of Digital circuit in VLSI design)

  • Designing of Different Logic gates / Flip-Flop and Latches using MUX
  • 2x1 Mux to 4x1 Mux and which one we prefer and why?
  • 2:4 Decoder to 4:16 decoder and which one is preferred and why?
  • PAL, PLA concepts
  • Tristate Buffers / Tristate Inverter
  • Clock Gating Concepts using AND/OR/NAND/NOR Gate and MUX
  • Memory concepts and use of decoder and Mux in Memory circuit
  • Standard Cell Library Concepts
  • Logic Optimization

Module 3: Linux (Basics and Advance)

Section 1: Fundamental

  • Development, Architecture and Features of Linux OS
  • Bash Scripting
  • Basic and Advanced Commands
  • Managing File System
  • Environment Variables
  • File Handling
  • Shell Programming.
  • Parameter handling and command substitutions.
  • Functions – Recursion writing.

Section 2: Advance

  • SED (Streaming Editor).
  • AWK (pretty printing).
  • Regular Expressions
  • TCL Scripting
  • Make utility (Makefile Writing for different tools and scripts).
  • Signals and Traps.
  • Cheat sheet.

Module 4: C/C++ Programming

  • Understanding of C/C++.
  • Constant, Variables and Data Types.
  • Operators and Expressions.
  • Input and Output Management.
  • User Defined Functions.
  • Structures and Unions.
  • Programming Process and Control Statements.
  • C++ Preprocessor, Variable Scope and Functions.
  • OOPs (Simple & Advance Classes).
  • Pointers.
  • Advanced Programming Concepts (File Input/Output, Debugging & Optimization, Operator Overloading, and Floating Point).

Module 5: Verilog HDL

Section 1: Fundamental

  • VLSI Design Verification Flow.
  • Different Modeling Styles.
  • Predefined Gate Primitives.
  • Continuous Data Assignments.
  • Hierarchy Creation, Module Instantiation and Mapping.
  • Stimulus Creation.
  • All types of Operators at any level of abstraction.
  • Behavioral Modeling.
  • Multiway Branching and Generate Blocks.
  • Delays, Event Control and Timing Regions at Higher Level of Abstraction.
  • Compiler Directives.
  • System Tasks and Functions.
  • Switch Level Modeling (Lowest Level Abstraction Level).
  • User Defined Primitives (UDPs).
  • Variable Change Dump (VCD).
  • Specify Block.
  • Tasks and Functions.

Section 2: Advance

  • RTL coding in different modeling styles
  • RTL coding for custom IPs
  • RTL coding for custom and standard Protocols used in modern SoCs
  • Create RTL wrappers to connect 3rd party and custom RTLs
  • Understanding of Synthesis in RTL
  • Understanding of Linting in RTL

Module 6: System Verilog

Section 1: Fundamental

  • Arrays, Structures and Data Types.
  • Program Control and Hierarchy.
  • Tasks and Functions New Features.
  • Interfaces.
  • Hierarchy and Connectivity of modules.
  • IPC (Inter Process Communication).
  • Semaphore and Mailbox.
  • Programs & Clocking Block.
  • Object Oriented Programming (OOP).
  • Randomization.
  • Functional Coverage.
  • SVA (System Verilog Assertions).
  • Verification Environment.
  • Labs.

Section 2: Advance

  • Design Guidelines using System Verilog
  • Object Oriented Verification Testbench Architecture
  • Functional Verification
  • Functional Coverage metric
  • Formal Verification
  • Stimulus writing using System Verilog
  • Interface wrappers and clocking blocks
  • Stimulus for read and write transactions

Module 7: UVM (Universal Verification Methodology)

Section 1: Fundamental

  • Introduction to UVM.
  • UVM Reporting.
  • UVM Transaction.
  • UVM Configuration.
  • UVM Factory.
  • UVM Sequences.
  • UVM Transaction Level Modeling (TLM).
  • UVM Callback.
  • UVM Testbench.
    • Testbench Top
    • UVM Test
    • UVM Environment
    • UVM Scoreboard
  • UVM Agent
  • UVM Monitor
  • UVM Driver
  • UVM Phases
  • UVM Sequencer

Section 2: Advance

  • Understanding of Standard UVM Library and Syntax
  • Create Standard Verification Environment
  • Create Drivers for Standard Protocols
  • Create Test Stimulus
  • Create Custom Sequences
  • Create Checkers

Module 8: Projects

Section 1: Modern SoC On-Chip Protocols

  • I2C
  • AMBA-APB
  • AMBA-AHB
  • AMBA-AXI

Section 2: Other Projects

  • Synchronous and Asynchronous FIFO
  • Dual Port RAM
  • RISC Processor
  • Traffic Light Controller

NOTE: TEST AND INTERVIEW CAN BE TAKEN AT ANY MOMENT

Trainer Details:

  1. Puneet Mittal – 17+ Years of Industry Experience & 5+ Years of Entrepreneur Experience. He is the Founder and CEO of VLSI Expert Pvt. Ltd. (LinkedIn Profile - https://www.linkedin.com/in/mittalpuneet/)                                                                                                                  
  2. Kavita Mehta - 10+ Years of Academic experience. She is the Manager, of eLearning, and Training at VLSI Expert Pvt. Ltd. (Linkedin Profile - https://www.linkedin.com/in/kavita- mehta-094035b/ )                                                                                                                                                                       
  3. Industry Expert 1 (As a Subject Matter Expert) – 10+ years of Industry Experience and expertise in Circuit design. IIT Ropar alumni & Ph.D. from IITD                                                                                                                                                                  
  4. Industry Expert 2 (As a Visiting Faculty) – 5+ years of Industry Experience & Expertise in Design Automation and verification.                                                                                                                                   
  5. Industry Expert 3 (As a Subject Matter Expert) - 8+ years of Industry Experience & Expertise in Memory Circuit & Layout Design. BITS Pilani Alumni - Highest Education M.Tech                                                                                                                                                                                                  
  6. Industry Expert 4 (As a Subject Matter Expert) - 9+ years of Industry Experience & Expertise in Physical Design - IIT Ropar alumni & Ph.D. from the USA                                                                                                                                                               
  7. Industry Expert 5 (As a Subject Matter Expert) - 9+ years of Industry Experience & Expertise in Physical Design - BITS Pilani Alumni - Highest Education M.Tech

Q- Who is giving this training?

ANS: This training is being conducted by VLSI EXPERT faculties or Industry Experts.

Q:- What is going to me mode of delivery of this training ?

ANS: This is an Instructor Led online Training.

Q: - What if I miss a session?

ANS: No issues if you miss a session and it was conducted online -  the same will be available on our online platform and you can go through is as many time as possible though the instructor won’t be available to solve your queries.

Q: - Is it Certification Course?

ANS: - Yes this is a certification Course.

Q: - Who will give the training Certificate?

ANS: - The training Certificate will be given by VLSI EXPERT.

Q: - Is it a Refundable Course?

ANS: - No.

  • Tool Used
  • Certification
  • Projects
  • Duration
  • Start Date
  • No of Seats
  • Assessments
  • Mode of Delivery
  • Placement Oriented
  • Fee
  • Synopsys
  • Yes
  • Yes
  • 4 Month
  • Check Calendar
  • 25
  • Yes
  • Online /Offline-LIVE
  • No
  • On Request
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